RISC-V Core IP RTL
Ready to synthesize RTL in your environment? Want to run SiFive RISC-V Core IP through your tool flow for a full evaluation? We make it simple. DocuSign our evaluation agreement and receive a fully functional, synthesizable Verilog RTL immediately.
SiFive’s E31 RISC-V Core is the world’s most deployed RISC-V core. Co-designed alongside the RISC-V ISA, the E31 takes maximum advantage of the RISC-V ISA, resulting in an ultra-power-efficient core that delivers the high performance needed for tomorrow’s smart IoT, wearables, and embedded microcontrollers.
SiFive’s E51 RISC-V Core is a 64-bit embedded processor, fully compliant with the RISC-V ISA. An extremely small-footprint, low-power design makes the E51 ideal for devices that require a tiny system controller for housekeeping, security, or host processing within a larger 64-bit SoC. An extended memory map of 40 physical address bits also makes the E51 a great solution for SSD controllers and networking applications.